Silicon On Insulator IDEs

Microfabricated Si/SiO₂ IDE chips for Semiconductor-Compatible Sensing and Advanced Thin-Film Research

Schnaiffer Si/SiO₂ interdigitated electrodes combine gold sensing electrodes with the mechanical precision of a silicon substrate and the electrical insulation of a silicon-dioxide surface layer.

Semiconductor compatible

IDEs provide a microfabrication-compatible platform for integrating sensing layers, microheaters and on-chip electronics.

Electrical isolation

The SiO₂ layer electrically isolates the electrodes from the silicon substrate, supporting reliable impedance and capacitance measurements.

Precise, stable surface

Alumina provides a rigid, thermally stable coating surface but requires careful handling because it is brittle.

ENGINEERED PLATFORM

PRODUCTS

High-Performance Alumina IDEs for Thermally Stable and Electrically Reliable Sensing

Alumina -100 um

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Product Specifications

  • Substrate system: silicon with silicon-dioxide insulating layer

  • Standard chip size: 10 × 10 mm

  • Electrode material: gold

  • Adhesion layer: titanium

  • Standard finger widths: 100 µm and 200 µm

  • Standard layouts: 3 different designs

  • Electrode configuration: two-terminal planar interdigitated structure

  • Surface access: exposed gold electrode and SiO₂ regions

  • Intended use: research, material characterization and sensor development

Biointerface

research

Supports functionalized surfaces for studying biomolecular binding, cell–surface interactions and electrochemical processes.

Chemical and environmental sensing

Detects changes in humidity, gases, solvents and ionic contaminants through impedance or capacitance variation.

Thin-film

characterization

Enables electrical evaluation of semiconducting, dielectric and conductive thin films under controlled test conditions.

Integrated microsystems

Suitable for research combining IDEs with microheaters, MEMS structures and silicon-compatible sensor electronics.

Photodetector development

Provides a silicon-compatible electrode platform for evaluating photoresponsive and optoelectronic sensing materials.

Advanced Si/SiO₂ IDEs, engineered for reliable electrical performance

APPLICATIONS

Measurement and Integration Recommendations

Alumina is opaque, so transmitted-light inspection through the chip is not possible. Top-side microscopy should be used to examine pattern coverage, cracks, delamination and particle agglomeration.

For reliable experiments:

  • Measure electrode resistance and open-circuit isolation before coating.

  • Record the uncoated impedance spectrum as a baseline.

  • Mask contact pads during spraying or drop casting.

  • Prevent conductive paste from spreading outside the intended active area.

  • Use thermally stable wiring for heated measurements.

  • Place the temperature sensor close to the active region.

  • Allow the device to reach thermal equilibrium.

  • Track baseline drift over repeated heating cycles.

  • Avoid excessive clamping force on the ceramic chip.

Why Schnaiffer

Multiple standard designs

One can choose among four Si/SiO₂ product variants without beginning with a fully custom fabrication run.

Schnaiffer helps researchers consider geometry, substrate coupling, coating properties and experimental fixtures before selecting the device.

Projects that move beyond a standard IDE can be reviewed for altered layouts, substrate specifications and integrated structures.

IDE chips undergo applicable visual inspection and continuity or isolation checks to identify pattern defects and unintended shorts.

Technical selection support

Quality control

Custom microfabrication capability

Move from Material Research to an Integrated Sensor

A well-selected Si/SiO₂ IDE can serve as the bridge between material characterization and an integrated semiconductor sensor.

Send Schnaiffer details of your sensing material, deposition method, particle or flake size, frequency range, expected resistance or capacitance, substrate-bias requirement and packaging constraints. We will help you choose a standard Si/SiO₂ IDE or evaluate a custom configuration

Frequently asked questions

Is the SiO₂ layer electrically insulating?

Yes, but its practical insulation performance depends on oxide thickness, quality, electric field, defects and operating environment. The oxide specification should be confirmed for demanding applications.

Can the silicon be used as a back gate?

Potentially, if the device is designed and electrically configured for this purpose. Silicon resistivity, oxide thickness, backside access and permissible gate voltage must be known before back-gate operation.

Can I use these IDEs for optical sensing?

They can be used with photoresponsive materials, but Si/SiO₂ is not transparent. Glass or quartz is more suitable when illumination or imaging through the substrate is required.

Which design should I order?

Select based on the complete dimensional drawing, coating method, sample volume, holder design and electrical measurement. Schnaiffer can help compare Designs 1, 2 and 3.

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Request the SOI IDE catalogue, dimensional drawings, price quotation or custom-design review.

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